World's Fastest CMOS DAC for 3G

Fujitsu announced the MB86064 Dual 14-bit 800MSa/s Digital to Analog Converter (DAC). This is the first Application Specific Standard Product (ASSP) based on its next-generation DAC technology.

Until today Fujitsu has been providing customers with early access to the next-generation DAC technology through mixed signal ASIC (MS-ASIC) solutions. The move to provide an ASSP solution will enable applications where a custom approach is either not required or not justified.

"This ASSP is integral to the roll-out of our latest DAC technology, opening up more opportunities and markets. The price/performance point achieved enables the cost-effective realization of high direct-IF multi-carrier systems for GSM, W-CDMA and UMTS," said Keith Horn, FMA's vice president of marketing.

As well as radically improved performance from innovative circuit designs, the product boasts a host of features ranging from the on-chip vector memories (which enhance system integration and test) to next-generation Segment Shuffling (which further improves dynamic performance). The vector memories enable waveforms to be downloaded and executed on-chip. For device test and evaluation this alleviates the need for a high-speed data generator, while in a final system application they are ideal for implementing tests on the subsequent analog signal chain.

Analog performance at high output frequencies is enhanced by novel current switch and switch driver designs that provide constant data-independent switching delay, reducing jitter and distortion. The leap in performance provided by this DAC will be instrumental in enabling new architectures to reduce the costs of existing cellular infrastructure systems while simultaneously addressing future needs. In four-carrier W-CDMA applications, ACPR of 70dBc can be achieved with direct-IF generation at 300MHz, with even higher performance at lower output frequencies.

"This development reflects our position as the leader in high-speed DAC technology," emphasized Ian Dedic, chief engineer at Fujitsu Microelectronics' Mixed Signal Division. "We have already been granted eight U.S. patents protecting the jitter reduction techniques and other innovations used in the MB86064, and have further patent applications pending both in the U.S. and other countries."

Direct-IF architectures can now demonstrate cost competitiveness to more traditional direct modulation architectures, while avoiding their inherent drawbacks. Bandwidths up to 100MHz can now be generated directly at these high IFs, sufficient to implement the entire UMTS band with digital pre-distortion.

The Segment Shuffling is a major enhancement over techniques introduced in the MB86060 and MB86061 DAC ASSPs. This improves performance to the level sought after for next-generation systems and high direct-IF architectures by moving distortion products out-of-band and reducing device-to-device variation.

"The MB86064 provides an unrivalled solution to the problem of generating wider transmit bandwidths in cellular base stations," highlighted Stephanos Thomopoulos, FMA's marketing manager for wireless products.

Implemented in Fujitsu's advanced mixed signal CS80A 0.18 micron CMOS process, the dual DAC core, combined with LVDS data inputs and a versatile serial control port, provides a complete high-performance DAC solution. Generating and driving the data for such a DAC has traditionally been restricted to expensive ECL-based technology.

However, the provision of a LVDS interface, combined with the advance in data-generating capabilities of ASSPs, ASICs and FPGAs, enables cost-effective, realizable solutions. In particular, clock-to-data timing across the data interface can be guaranteed by using FPGAs with Phase Locked Loop (PLL) or Delay-Locked Loop (DLL) clock generators and external reference clock loop-back.

The provision of a dual DAC has particular benefit to cellular infrastructure applications, for example, either transmit with diversity or combined dual transmit configurations. Other application areas are expected to include test equipment and video/display systems.

The MB86064 is housed in Fujitsu's enhanced fine-pitch ball grid array (EFBGA) package. The EFBGA range has been developed specifically to meet the needs of high-performance mixed signal devices. Benefits include optimized signal routing within the package, easier PCB tracking and excellent thermal properties assisted by a thermal ball array directly under the device. Using the 120-ball variant, the package measures 12mm x 12mm.

Customer development kits and sample devices are available today. Mass production is scheduled for 3Q CY2003.