Building upon its worldwide industry leadership in the development of advanced packaging solutions, Toshiba America Electronic Components, Inc. (TAEC)* with its parent company, Toshiba Corporation (Toshiba) today introduced two four-chip NOR flash and SRAM memory devices, each housed in the smallest multi-chip package (MCP) currently available. The new MCP devices, measuring 10 millimeters (mm) long and 7mm wide, combine 8 megabits (Mb) of Static Random Access Memory (SRAM) and 32Mb Pseudo SRAM (PSRAM) with two 64Mb NOR flash memory chips, increasing overall functionality while reducing board space by 30 percent, as compared to Toshiba's current MCP offering, which measures 9mm x 12mm.

All four chips contained within the space-saving MCP are produced by Toshiba, the only MCP manufacturer currently producing all of its own die. Each chip housed within the new MCP provides specialized functionality, such as low-power SRAM for CPU memory, PSRAM for video buffering, NOR for code storage, and a secondary NOR chip for data storage. Designated THPV357022BCBB and THPV357023BCBB, the new devices are available in either top or bottom boot block respectively.

"Designers of hand-held devices, particularly 2.5G and 3G full-featured mobile phones, are demanding new options that will enable them to pack more functionality onto an ever-shrinking board space. Since conventional SRAM and NOR flash solutions are, in many cases, both cost and board-space prohibitive for some mobile applications, there is a definite industry need for the MCP devices we are introducing," said Paul Liu, business development manager for communications memory products for TAEC. "Our ability to combine four chips into the smallest MCP currently available is exciting in that it will ultimately contribute to higher integration in mobile phones, while establishing yet another industry first to add to Toshiba's proven leadership in memory and packaging technology."

Most mobile phones integrate low power SRAM divided into two areas which include buffer and working memory, and store applications via NOR flash memory. With the expansion of functionality in mobile applications, PSRAM has also been added to complement SRAM and flash for file memory. PSRAM is incorporated instead of additional SRAM due to its lower cost-per-bit and because the video buffer does not have to be refreshed when not in use.

As mobile phones incorporate such functionality as Internet capability and transmitting of still and video images, the requirements for random access memory and NOR flash memory continue to increase without any corresponding increase in handset size. Toshiba has employed the most advanced process technologies to meet capacity needs and space constraints with its recently announced 64Mb NOR flash memory, fabricated using the 0.16 micron design rule, as well as with these new, smaller MCP devices.

Toshiba plans to leverage its market advantage as the only supplier manufacturing all four SRAM, PSRAM, NOR and NAND memories by stacking different architecture combinations within MCPs to meet evolving and diversified customer requirements. A pioneer in both NAND and NOR flash memory, Toshiba plans to incorporate NAND flash into its four chip MCPs very soon to enable further cost reduction, with a 16Mb SRAM, 64Mb PSRAM, 128Mb NOR and 128Mb NAND combination packaged within a 9mm x 12mm MCP scheduled for introduction in late second quarter, 2002.

Key features

-- Density: 8Mb SRAM + 32Mb PSRAM + 64Mb NOR + 64Mb NOR

-- VDD: 2.5 - 3.3 volts (V)

-- Access time: 65 nanosecond (ns) at 2.7V

-- Page mode: PSRAM and NOR Flash support page mode with a page cycle

time of 25ns at 2.7V

-- Packaging: 85-pin ball grid array (BGA) MCP measuring 7mm x 10mm --

the smallest of 4 die stacked MCP currently available.

Pricing and Availability

Samples of the Toshiba four-chip MCP devices, priced at $70 each, are scheduled to become available next month. Full production is scheduled for May 2002.